Generally, integrated circuits are mass produced by forming many identical circuit patterns on a single silicon wafer, which is thereafter cut into many identical dies or "chips." Integrated circuits, also commonly referred to as semiconductor devices, are made of various materials that may be electrically conductive, electrically nonconductive or electrically semiconductive. Silicon, in single crystal or polycrystalline form, is the most commonly used semiconductor material. Both forms of silicon can be made electrically conductive by adding impurities. The introduction of impurities into silicon is commonly referred to as doping. Silicon is typically doped with boron or phosphorus. Boron atoms have one less valence electron than silicon atoms. Therefore, if the silicon is doped with boron, then electron "holes" become the dominant charge carrier and the doped silicon is referred to as p-type silicon. By contrast, phosphorous atoms have one more valence electron than silicon atoms. If the silicon is doped with phosphorous, then electrons become the dominant charge carriers and the doped silicon is referred to as n-type silicon.
Dynamic Random Access Memory devices (DRAMs) comprise arrays of memory cells which contain two basic components--a field effect access transistor and a capacitor. Typically, one side of the transistor is connected to one side of the capacitor. This connection is made between a capacitor bottom electrode or "storage node" and an active area. The substrate areas in a DRAM in which electrical connections are made are generally referred to as active areas. Active areas consist of discrete specially doped regions in the surface of the silicon substrate which serve as electrical contact points (or "buried contacts") as well as source/drain regions for the access transistor. The other side of the transistor and the transistor gate electrode are connected to external contacts--a bit line and a word line, respectively. The other side of the capacitor, the capacitor top electrode or "cell plate," is connected to a reference voltage. Therefore, the formation of the DRAM memory cell comprises the formation of a transistor, a capacitor, a connection between the capacitor and the transistor, and contacts to external circuits.
The many advantages of the formation of smaller circuit components, so that more and more memory cells may be packed onto each chip, are well known. One such advantage of miniaturization of cell components, and the corresponding reduction in memory cell spacing, is that the operating voltages for the DRAM may be decreased. Thus, the cost to operate the device is reduced and its reliability and longevity is enhanced. Lower operating voltages, however, reduce the time within which each memory cell must be recharged or "refreshed" because less charge is stored on the cell. In DRAMs, the charge on each memory cell must be refreshed periodically because the cell loses or "leaks" charge through the junctions between areas within the silicon substrate having different doping/conductivity characteristics. If the cell is not refreshed before losing a threshold level of charge, then the cell will fail, i.e., lose the bit of information stored therein. And, if a cell fails, then the chip itself is defective and cannot be used. The rate at which charge is leaked through these junctions is an important factor in determining refresh time --the time within which each cell must be recharged. Consequently, it is advantageous to minimize junction leakage to increase refresh time and help compensate for the reductions in refresh time caused by lower operating voltages.
Improvements in refresh are also needed to compensate for increased packing densities. As more and more cells are packed onto each chip, more time is required to refresh all of the cells on the chip. Further, as cell size is reduced, the junction perimeter becomes a more dominant source of leakage and refresh loss mechanism. Since refresh time is controlled by the weakest cell, the average refresh for all cells must be increased to keep the weakest cell above the minimum threshold. There is, thus, a need to lessen or eliminate the effects of perimeter junction leakage and other loss mechanisms to enhance refresh.